AD9268BCPZ-125

AD9268 is a dual, 16bit, 80 MSPS/105 MSPS/125 MSPS analogue-to-digital converter (ADC). This is designed to support communications applications where high performance, combined with low cost, small size, and versatility is desired. The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth and differential sample-and-hold analogy input amplifiers that support a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance. Application includes communications, diversity radio systems, multimode digital receivers (3G), GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA, I/Q demodulation systems, smart antenna systems, general-purpose software radios broadband data applications, and ultrasound equipment.

• Integer 1-to-8 input clock divider
• IF sampling frequencies to 300MHz
• Optional on-chip dither
• Programmable internal ADC voltage reference
• Integrated ADC sample-and-hold inputs
• Differential analogy inputs with 650MHz bandwidth
• ADC clock duty cycle stabilizer, energy-saving power-down modes
• User-configurable, built-in self-test (BIST) capability
• Operating temperature rating range from -40 to +85°C
• 64-lead frame chip scale package [LFCSP-VQ]

Notes

ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party